A “system-in-a-package” (SIP) or a “chip stack,” refers to a semiconductor device that incorporates multiple chips that make up a complete electronic system enclosed in a single package or module. In an SIP, dies containing integrated circuits may be stacked vertically. They are internally connected by fine wires that are bonded to the package. Alternatively, with a flip chip technology, solder bumps may be used to join stacked chips together.
An exemplary SIP can contain several chips, such as a specialized processor, dynamic random access memory (DRAM), flash memory, and so forth, combined with passive components, such as resistors, capacitors, and the like. Thus, a complete functional unit may be built in a multi-chip package so that few external components need to be added to make it work. The single package approach of SIP allows for tremendous space savings and significant down-sizing of the electronic devices in which they are incorporated. Thus, such stacked device assemblies are particularly valuable in spaced constrained environments such as mobile phones, digital music players, and the like.
Within electronic devices, the formation of transistors, diodes, capacitors, and resistors at least partially within a substrate is conventional. Some devices can include devices coils. These device coils are implemented, for example, as inductors and transformers. Device coils known as planar inductors have been formed, by laying out a trace in a spiral pattern on a substrate. Unfortunately, however, the small dimensions of such planar inductors limit their inductance. In addition, they can possess characteristics that are undesirable. For example, the planar inductor can generate an electromagnetic flux when it is operating that is substantially perpendicular to the major surface of the substrate. This electromagnetic flux can cause adverse affects.
Non-planar inductors may alternatively be employed. A non-planar inductor can include a plurality of spaced-apart conductive traces that are electrically connected by wirebonds via device bonding pads. The non-planar configuration of such inductors can mitigate the problems associated with electromagnetic flux. However, the inductance value of the non-planar inductors can be undesirably low due to the limited number of turns of the coil that are possible within the limited confines of an SIP, or stacked semiconductor device assembly, and due to size limitations of the device bonding pads and the wirebonds.